30 #ifndef _SAM3N_RTT_COMPONENT_ 31 #define _SAM3N_RTT_COMPONENT_ 39 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 49 #define RTT_MR_RTPRES_Pos 0 50 #define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) 51 #define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))) 52 #define RTT_MR_ALMIEN (0x1u << 16) 53 #define RTT_MR_RTTINCIEN (0x1u << 17) 54 #define RTT_MR_RTTRST (0x1u << 18) 56 #define RTT_AR_ALMV_Pos 0 57 #define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) 58 #define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))) 60 #define RTT_VR_CRTV_Pos 0 61 #define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) 63 #define RTT_SR_ALMS (0x1u << 0) 64 #define RTT_SR_RTTINC (0x1u << 1) RwReg RTT_AR
(Rtt Offset: 0x04) Alarm Register
Definition: component_rtt.h:43
volatile uint32_t RwReg
Definition: sam3n00a.h:54
RoReg RTT_SR
(Rtt Offset: 0x0C) Status Register
Definition: component_rtt.h:45
RoReg RTT_VR
(Rtt Offset: 0x08) Value Register
Definition: component_rtt.h:44
RwReg RTT_MR
(Rtt Offset: 0x00) Mode Register
Definition: component_rtt.h:42
Rtt hardware registers.
Definition: component_rtt.h:41
volatile const uint32_t RoReg
Definition: sam3n00a.h:49