Robobo
instance_adc.h
1 /* ----------------------------------------------------------------------------
2  * SAM Software Package License
3  * ----------------------------------------------------------------------------
4  * Copyright (c) 2012, Atmel Corporation
5  *
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following condition is met:
10  *
11  * - Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the disclaimer below.
13  *
14  * Atmel's name may not be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  * ----------------------------------------------------------------------------
28  */
29 
30 #ifndef _SAM3N_ADC_INSTANCE_
31 #define _SAM3N_ADC_INSTANCE_
32 
33 /* ========== Register definition for ADC peripheral ========== */
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_ADC_CR (0x40038000U)
36 #define REG_ADC_MR (0x40038004U)
37 #define REG_ADC_SEQR1 (0x40038008U)
38 #define REG_ADC_SEQR2 (0x4003800CU)
39 #define REG_ADC_CHER (0x40038010U)
40 #define REG_ADC_CHDR (0x40038014U)
41 #define REG_ADC_CHSR (0x40038018U)
42 #define REG_ADC_LCDR (0x40038020U)
43 #define REG_ADC_IER (0x40038024U)
44 #define REG_ADC_IDR (0x40038028U)
45 #define REG_ADC_IMR (0x4003802CU)
46 #define REG_ADC_ISR (0x40038030U)
47 #define REG_ADC_OVER (0x4003803CU)
48 #define REG_ADC_EMR (0x40038040U)
49 #define REG_ADC_CWR (0x40038044U)
50 #define REG_ADC_CDR (0x40038050U)
51 #define REG_ADC_WPMR (0x400380E4U)
52 #define REG_ADC_WPSR (0x400380E8U)
53 #define REG_ADC_RPR (0x40038100U)
54 #define REG_ADC_RCR (0x40038104U)
55 #define REG_ADC_RNPR (0x40038110U)
56 #define REG_ADC_RNCR (0x40038114U)
57 #define REG_ADC_PTCR (0x40038120U)
58 #define REG_ADC_PTSR (0x40038124U)
59 #else
60 #define REG_ADC_CR (*(WoReg*)0x40038000U)
61 #define REG_ADC_MR (*(RwReg*)0x40038004U)
62 #define REG_ADC_SEQR1 (*(RwReg*)0x40038008U)
63 #define REG_ADC_SEQR2 (*(RwReg*)0x4003800CU)
64 #define REG_ADC_CHER (*(WoReg*)0x40038010U)
65 #define REG_ADC_CHDR (*(WoReg*)0x40038014U)
66 #define REG_ADC_CHSR (*(RoReg*)0x40038018U)
67 #define REG_ADC_LCDR (*(RoReg*)0x40038020U)
68 #define REG_ADC_IER (*(WoReg*)0x40038024U)
69 #define REG_ADC_IDR (*(WoReg*)0x40038028U)
70 #define REG_ADC_IMR (*(RoReg*)0x4003802CU)
71 #define REG_ADC_ISR (*(RoReg*)0x40038030U)
72 #define REG_ADC_OVER (*(RoReg*)0x4003803CU)
73 #define REG_ADC_EMR (*(RwReg*)0x40038040U)
74 #define REG_ADC_CWR (*(RwReg*)0x40038044U)
75 #define REG_ADC_CDR (*(RoReg*)0x40038050U)
76 #define REG_ADC_WPMR (*(RwReg*)0x400380E4U)
77 #define REG_ADC_WPSR (*(RoReg*)0x400380E8U)
78 #define REG_ADC_RPR (*(RwReg*)0x40038100U)
79 #define REG_ADC_RCR (*(RwReg*)0x40038104U)
80 #define REG_ADC_RNPR (*(RwReg*)0x40038110U)
81 #define REG_ADC_RNCR (*(RwReg*)0x40038114U)
82 #define REG_ADC_PTCR (*(WoReg*)0x40038120U)
83 #define REG_ADC_PTSR (*(RoReg*)0x40038124U)
84 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
85 
86 #endif /* _SAM3N_ADC_INSTANCE_ */