Robobo
instance_dacc.h
1 /* ----------------------------------------------------------------------------
2  * SAM Software Package License
3  * ----------------------------------------------------------------------------
4  * Copyright (c) 2012, Atmel Corporation
5  *
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following condition is met:
10  *
11  * - Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the disclaimer below.
13  *
14  * Atmel's name may not be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  * ----------------------------------------------------------------------------
28  */
29 
30 #ifndef _SAM3S_DACC_INSTANCE_
31 #define _SAM3S_DACC_INSTANCE_
32 
33 /* ========== Register definition for DACC peripheral ========== */
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_DACC_CR (0x4003C000U)
36 #define REG_DACC_MR (0x4003C004U)
37 #define REG_DACC_CHER (0x4003C010U)
38 #define REG_DACC_CHDR (0x4003C014U)
39 #define REG_DACC_CHSR (0x4003C018U)
40 #define REG_DACC_CDR (0x4003C020U)
41 #define REG_DACC_IER (0x4003C024U)
42 #define REG_DACC_IDR (0x4003C028U)
43 #define REG_DACC_IMR (0x4003C02CU)
44 #define REG_DACC_ISR (0x4003C030U)
45 #define REG_DACC_ACR (0x4003C094U)
46 #define REG_DACC_WPMR (0x4003C0E4U)
47 #define REG_DACC_WPSR (0x4003C0E8U)
48 #define REG_DACC_TPR (0x4003C108U)
49 #define REG_DACC_TCR (0x4003C10CU)
50 #define REG_DACC_TNPR (0x4003C118U)
51 #define REG_DACC_TNCR (0x4003C11CU)
52 #define REG_DACC_PTCR (0x4003C120U)
53 #define REG_DACC_PTSR (0x4003C124U)
54 #else
55 #define REG_DACC_CR (*(WoReg*)0x4003C000U)
56 #define REG_DACC_MR (*(RwReg*)0x4003C004U)
57 #define REG_DACC_CHER (*(WoReg*)0x4003C010U)
58 #define REG_DACC_CHDR (*(WoReg*)0x4003C014U)
59 #define REG_DACC_CHSR (*(RoReg*)0x4003C018U)
60 #define REG_DACC_CDR (*(WoReg*)0x4003C020U)
61 #define REG_DACC_IER (*(WoReg*)0x4003C024U)
62 #define REG_DACC_IDR (*(WoReg*)0x4003C028U)
63 #define REG_DACC_IMR (*(RoReg*)0x4003C02CU)
64 #define REG_DACC_ISR (*(RoReg*)0x4003C030U)
65 #define REG_DACC_ACR (*(RwReg*)0x4003C094U)
66 #define REG_DACC_WPMR (*(RwReg*)0x4003C0E4U)
67 #define REG_DACC_WPSR (*(RoReg*)0x4003C0E8U)
68 #define REG_DACC_TPR (*(RwReg*)0x4003C108U)
69 #define REG_DACC_TCR (*(RwReg*)0x4003C10CU)
70 #define REG_DACC_TNPR (*(RwReg*)0x4003C118U)
71 #define REG_DACC_TNCR (*(RwReg*)0x4003C11CU)
72 #define REG_DACC_PTCR (*(WoReg*)0x4003C120U)
73 #define REG_DACC_PTSR (*(RoReg*)0x4003C124U)
74 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
75 
76 #endif /* _SAM3S_DACC_INSTANCE_ */