30 #ifndef _SAM3N_PIOC_INSTANCE_ 31 #define _SAM3N_PIOC_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_PIOC_PER (0x400E1200U) 36 #define REG_PIOC_PDR (0x400E1204U) 37 #define REG_PIOC_PSR (0x400E1208U) 38 #define REG_PIOC_OER (0x400E1210U) 39 #define REG_PIOC_ODR (0x400E1214U) 40 #define REG_PIOC_OSR (0x400E1218U) 41 #define REG_PIOC_IFER (0x400E1220U) 42 #define REG_PIOC_IFDR (0x400E1224U) 43 #define REG_PIOC_IFSR (0x400E1228U) 44 #define REG_PIOC_SODR (0x400E1230U) 45 #define REG_PIOC_CODR (0x400E1234U) 46 #define REG_PIOC_ODSR (0x400E1238U) 47 #define REG_PIOC_PDSR (0x400E123CU) 48 #define REG_PIOC_IER (0x400E1240U) 49 #define REG_PIOC_IDR (0x400E1244U) 50 #define REG_PIOC_IMR (0x400E1248U) 51 #define REG_PIOC_ISR (0x400E124CU) 52 #define REG_PIOC_MDER (0x400E1250U) 53 #define REG_PIOC_MDDR (0x400E1254U) 54 #define REG_PIOC_MDSR (0x400E1258U) 55 #define REG_PIOC_PUDR (0x400E1260U) 56 #define REG_PIOC_PUER (0x400E1264U) 57 #define REG_PIOC_PUSR (0x400E1268U) 58 #define REG_PIOC_ABCDSR (0x400E1270U) 59 #define REG_PIOC_IFSCDR (0x400E1280U) 60 #define REG_PIOC_IFSCER (0x400E1284U) 61 #define REG_PIOC_IFSCSR (0x400E1288U) 62 #define REG_PIOC_SCDR (0x400E128CU) 63 #define REG_PIOC_PPDDR (0x400E1290U) 64 #define REG_PIOC_PPDER (0x400E1294U) 65 #define REG_PIOC_PPDSR (0x400E1298U) 66 #define REG_PIOC_OWER (0x400E12A0U) 67 #define REG_PIOC_OWDR (0x400E12A4U) 68 #define REG_PIOC_OWSR (0x400E12A8U) 69 #define REG_PIOC_AIMER (0x400E12B0U) 70 #define REG_PIOC_AIMDR (0x400E12B4U) 71 #define REG_PIOC_AIMMR (0x400E12B8U) 72 #define REG_PIOC_ESR (0x400E12C0U) 73 #define REG_PIOC_LSR (0x400E12C4U) 74 #define REG_PIOC_ELSR (0x400E12C8U) 75 #define REG_PIOC_FELLSR (0x400E12D0U) 76 #define REG_PIOC_REHLSR (0x400E12D4U) 77 #define REG_PIOC_FRLHSR (0x400E12D8U) 78 #define REG_PIOC_LOCKSR (0x400E12E0U) 79 #define REG_PIOC_WPMR (0x400E12E4U) 80 #define REG_PIOC_WPSR (0x400E12E8U) 81 #define REG_PIOC_SCHMITT (0x400E1300U) 83 #define REG_PIOC_PER (*(WoReg*)0x400E1200U) 84 #define REG_PIOC_PDR (*(WoReg*)0x400E1204U) 85 #define REG_PIOC_PSR (*(RoReg*)0x400E1208U) 86 #define REG_PIOC_OER (*(WoReg*)0x400E1210U) 87 #define REG_PIOC_ODR (*(WoReg*)0x400E1214U) 88 #define REG_PIOC_OSR (*(RoReg*)0x400E1218U) 89 #define REG_PIOC_IFER (*(WoReg*)0x400E1220U) 90 #define REG_PIOC_IFDR (*(WoReg*)0x400E1224U) 91 #define REG_PIOC_IFSR (*(RoReg*)0x400E1228U) 92 #define REG_PIOC_SODR (*(WoReg*)0x400E1230U) 93 #define REG_PIOC_CODR (*(WoReg*)0x400E1234U) 94 #define REG_PIOC_ODSR (*(RwReg*)0x400E1238U) 95 #define REG_PIOC_PDSR (*(RoReg*)0x400E123CU) 96 #define REG_PIOC_IER (*(WoReg*)0x400E1240U) 97 #define REG_PIOC_IDR (*(WoReg*)0x400E1244U) 98 #define REG_PIOC_IMR (*(RoReg*)0x400E1248U) 99 #define REG_PIOC_ISR (*(RoReg*)0x400E124CU) 100 #define REG_PIOC_MDER (*(WoReg*)0x400E1250U) 101 #define REG_PIOC_MDDR (*(WoReg*)0x400E1254U) 102 #define REG_PIOC_MDSR (*(RoReg*)0x400E1258U) 103 #define REG_PIOC_PUDR (*(WoReg*)0x400E1260U) 104 #define REG_PIOC_PUER (*(WoReg*)0x400E1264U) 105 #define REG_PIOC_PUSR (*(RoReg*)0x400E1268U) 106 #define REG_PIOC_ABCDSR (*(RwReg*)0x400E1270U) 107 #define REG_PIOC_IFSCDR (*(WoReg*)0x400E1280U) 108 #define REG_PIOC_IFSCER (*(WoReg*)0x400E1284U) 109 #define REG_PIOC_IFSCSR (*(RoReg*)0x400E1288U) 110 #define REG_PIOC_SCDR (*(RwReg*)0x400E128CU) 111 #define REG_PIOC_PPDDR (*(WoReg*)0x400E1290U) 112 #define REG_PIOC_PPDER (*(WoReg*)0x400E1294U) 113 #define REG_PIOC_PPDSR (*(RoReg*)0x400E1298U) 114 #define REG_PIOC_OWER (*(WoReg*)0x400E12A0U) 115 #define REG_PIOC_OWDR (*(WoReg*)0x400E12A4U) 116 #define REG_PIOC_OWSR (*(RoReg*)0x400E12A8U) 117 #define REG_PIOC_AIMER (*(WoReg*)0x400E12B0U) 118 #define REG_PIOC_AIMDR (*(WoReg*)0x400E12B4U) 119 #define REG_PIOC_AIMMR (*(RoReg*)0x400E12B8U) 120 #define REG_PIOC_ESR (*(WoReg*)0x400E12C0U) 121 #define REG_PIOC_LSR (*(WoReg*)0x400E12C4U) 122 #define REG_PIOC_ELSR (*(RoReg*)0x400E12C8U) 123 #define REG_PIOC_FELLSR (*(WoReg*)0x400E12D0U) 124 #define REG_PIOC_REHLSR (*(WoReg*)0x400E12D4U) 125 #define REG_PIOC_FRLHSR (*(RoReg*)0x400E12D8U) 126 #define REG_PIOC_LOCKSR (*(RoReg*)0x400E12E0U) 127 #define REG_PIOC_WPMR (*(RwReg*)0x400E12E4U) 128 #define REG_PIOC_WPSR (*(RoReg*)0x400E12E8U) 129 #define REG_PIOC_SCHMITT (*(RwReg*)0x400E1300U)