30 #ifndef _SAM3U_PIOC_INSTANCE_ 31 #define _SAM3U_PIOC_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_PIOC_PER (0x400E1000U) 36 #define REG_PIOC_PDR (0x400E1004U) 37 #define REG_PIOC_PSR (0x400E1008U) 38 #define REG_PIOC_OER (0x400E1010U) 39 #define REG_PIOC_ODR (0x400E1014U) 40 #define REG_PIOC_OSR (0x400E1018U) 41 #define REG_PIOC_IFER (0x400E1020U) 42 #define REG_PIOC_IFDR (0x400E1024U) 43 #define REG_PIOC_IFSR (0x400E1028U) 44 #define REG_PIOC_SODR (0x400E1030U) 45 #define REG_PIOC_CODR (0x400E1034U) 46 #define REG_PIOC_ODSR (0x400E1038U) 47 #define REG_PIOC_PDSR (0x400E103CU) 48 #define REG_PIOC_IER (0x400E1040U) 49 #define REG_PIOC_IDR (0x400E1044U) 50 #define REG_PIOC_IMR (0x400E1048U) 51 #define REG_PIOC_ISR (0x400E104CU) 52 #define REG_PIOC_MDER (0x400E1050U) 53 #define REG_PIOC_MDDR (0x400E1054U) 54 #define REG_PIOC_MDSR (0x400E1058U) 55 #define REG_PIOC_PUDR (0x400E1060U) 56 #define REG_PIOC_PUER (0x400E1064U) 57 #define REG_PIOC_PUSR (0x400E1068U) 58 #define REG_PIOC_ABSR (0x400E1070U) 59 #define REG_PIOC_SCIFSR (0x400E1080U) 60 #define REG_PIOC_DIFSR (0x400E1084U) 61 #define REG_PIOC_IFDGSR (0x400E1088U) 62 #define REG_PIOC_SCDR (0x400E108CU) 63 #define REG_PIOC_OWER (0x400E10A0U) 64 #define REG_PIOC_OWDR (0x400E10A4U) 65 #define REG_PIOC_OWSR (0x400E10A8U) 66 #define REG_PIOC_AIMER (0x400E10B0U) 67 #define REG_PIOC_AIMDR (0x400E10B4U) 68 #define REG_PIOC_AIMMR (0x400E10B8U) 69 #define REG_PIOC_ESR (0x400E10C0U) 70 #define REG_PIOC_LSR (0x400E10C4U) 71 #define REG_PIOC_ELSR (0x400E10C8U) 72 #define REG_PIOC_FELLSR (0x400E10D0U) 73 #define REG_PIOC_REHLSR (0x400E10D4U) 74 #define REG_PIOC_FRLHSR (0x400E10D8U) 75 #define REG_PIOC_LOCKSR (0x400E10E0U) 76 #define REG_PIOC_WPMR (0x400E10E4U) 77 #define REG_PIOC_WPSR (0x400E10E8U) 79 #define REG_PIOC_PER (*(WoReg*)0x400E1000U) 80 #define REG_PIOC_PDR (*(WoReg*)0x400E1004U) 81 #define REG_PIOC_PSR (*(RoReg*)0x400E1008U) 82 #define REG_PIOC_OER (*(WoReg*)0x400E1010U) 83 #define REG_PIOC_ODR (*(WoReg*)0x400E1014U) 84 #define REG_PIOC_OSR (*(RoReg*)0x400E1018U) 85 #define REG_PIOC_IFER (*(WoReg*)0x400E1020U) 86 #define REG_PIOC_IFDR (*(WoReg*)0x400E1024U) 87 #define REG_PIOC_IFSR (*(RoReg*)0x400E1028U) 88 #define REG_PIOC_SODR (*(WoReg*)0x400E1030U) 89 #define REG_PIOC_CODR (*(WoReg*)0x400E1034U) 90 #define REG_PIOC_ODSR (*(RwReg*)0x400E1038U) 91 #define REG_PIOC_PDSR (*(RoReg*)0x400E103CU) 92 #define REG_PIOC_IER (*(WoReg*)0x400E1040U) 93 #define REG_PIOC_IDR (*(WoReg*)0x400E1044U) 94 #define REG_PIOC_IMR (*(RoReg*)0x400E1048U) 95 #define REG_PIOC_ISR (*(RoReg*)0x400E104CU) 96 #define REG_PIOC_MDER (*(WoReg*)0x400E1050U) 97 #define REG_PIOC_MDDR (*(WoReg*)0x400E1054U) 98 #define REG_PIOC_MDSR (*(RoReg*)0x400E1058U) 99 #define REG_PIOC_PUDR (*(WoReg*)0x400E1060U) 100 #define REG_PIOC_PUER (*(WoReg*)0x400E1064U) 101 #define REG_PIOC_PUSR (*(RoReg*)0x400E1068U) 102 #define REG_PIOC_ABSR (*(RwReg*)0x400E1070U) 103 #define REG_PIOC_SCIFSR (*(WoReg*)0x400E1080U) 104 #define REG_PIOC_DIFSR (*(WoReg*)0x400E1084U) 105 #define REG_PIOC_IFDGSR (*(RoReg*)0x400E1088U) 106 #define REG_PIOC_SCDR (*(RwReg*)0x400E108CU) 107 #define REG_PIOC_OWER (*(WoReg*)0x400E10A0U) 108 #define REG_PIOC_OWDR (*(WoReg*)0x400E10A4U) 109 #define REG_PIOC_OWSR (*(RoReg*)0x400E10A8U) 110 #define REG_PIOC_AIMER (*(WoReg*)0x400E10B0U) 111 #define REG_PIOC_AIMDR (*(WoReg*)0x400E10B4U) 112 #define REG_PIOC_AIMMR (*(RoReg*)0x400E10B8U) 113 #define REG_PIOC_ESR (*(WoReg*)0x400E10C0U) 114 #define REG_PIOC_LSR (*(WoReg*)0x400E10C4U) 115 #define REG_PIOC_ELSR (*(RoReg*)0x400E10C8U) 116 #define REG_PIOC_FELLSR (*(WoReg*)0x400E10D0U) 117 #define REG_PIOC_REHLSR (*(WoReg*)0x400E10D4U) 118 #define REG_PIOC_FRLHSR (*(RoReg*)0x400E10D8U) 119 #define REG_PIOC_LOCKSR (*(RoReg*)0x400E10E0U) 120 #define REG_PIOC_WPMR (*(RwReg*)0x400E10E4U) 121 #define REG_PIOC_WPSR (*(RoReg*)0x400E10E8U)