30 #ifndef _SAM3XA_PMC_INSTANCE_ 31 #define _SAM3XA_PMC_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_PMC_SCER (0x400E0600U) 36 #define REG_PMC_SCDR (0x400E0604U) 37 #define REG_PMC_SCSR (0x400E0608U) 38 #define REG_PMC_PCER0 (0x400E0610U) 39 #define REG_PMC_PCDR0 (0x400E0614U) 40 #define REG_PMC_PCSR0 (0x400E0618U) 41 #define REG_CKGR_UCKR (0x400E061CU) 42 #define REG_CKGR_MOR (0x400E0620U) 43 #define REG_CKGR_MCFR (0x400E0624U) 44 #define REG_CKGR_PLLAR (0x400E0628U) 45 #define REG_PMC_MCKR (0x400E0630U) 46 #define REG_PMC_USB (0x400E0638U) 47 #define REG_PMC_PCK (0x400E0640U) 48 #define REG_PMC_IER (0x400E0660U) 49 #define REG_PMC_IDR (0x400E0664U) 50 #define REG_PMC_SR (0x400E0668U) 51 #define REG_PMC_IMR (0x400E066CU) 52 #define REG_PMC_FSMR (0x400E0670U) 53 #define REG_PMC_FSPR (0x400E0674U) 54 #define REG_PMC_FOCR (0x400E0678U) 55 #define REG_PMC_WPMR (0x400E06E4U) 56 #define REG_PMC_WPSR (0x400E06E8U) 57 #define REG_PMC_PCER1 (0x400E0700U) 58 #define REG_PMC_PCDR1 (0x400E0704U) 59 #define REG_PMC_PCSR1 (0x400E0708U) 60 #define REG_PMC_PCR (0x400E070CU) 62 #define REG_PMC_SCER (*(WoReg*)0x400E0600U) 63 #define REG_PMC_SCDR (*(WoReg*)0x400E0604U) 64 #define REG_PMC_SCSR (*(RoReg*)0x400E0608U) 65 #define REG_PMC_PCER0 (*(WoReg*)0x400E0610U) 66 #define REG_PMC_PCDR0 (*(WoReg*)0x400E0614U) 67 #define REG_PMC_PCSR0 (*(RoReg*)0x400E0618U) 68 #define REG_CKGR_UCKR (*(RwReg*)0x400E061CU) 69 #define REG_CKGR_MOR (*(RwReg*)0x400E0620U) 70 #define REG_CKGR_MCFR (*(RoReg*)0x400E0624U) 71 #define REG_CKGR_PLLAR (*(RwReg*)0x400E0628U) 72 #define REG_PMC_MCKR (*(RwReg*)0x400E0630U) 73 #define REG_PMC_USB (*(RwReg*)0x400E0638U) 74 #define REG_PMC_PCK (*(RwReg*)0x400E0640U) 75 #define REG_PMC_IER (*(WoReg*)0x400E0660U) 76 #define REG_PMC_IDR (*(WoReg*)0x400E0664U) 77 #define REG_PMC_SR (*(RoReg*)0x400E0668U) 78 #define REG_PMC_IMR (*(RoReg*)0x400E066CU) 79 #define REG_PMC_FSMR (*(RwReg*)0x400E0670U) 80 #define REG_PMC_FSPR (*(RwReg*)0x400E0674U) 81 #define REG_PMC_FOCR (*(WoReg*)0x400E0678U) 82 #define REG_PMC_WPMR (*(RwReg*)0x400E06E4U) 83 #define REG_PMC_WPSR (*(RoReg*)0x400E06E8U) 84 #define REG_PMC_PCER1 (*(WoReg*)0x400E0700U) 85 #define REG_PMC_PCDR1 (*(WoReg*)0x400E0704U) 86 #define REG_PMC_PCSR1 (*(RoReg*)0x400E0708U) 87 #define REG_PMC_PCR (*(RwReg*)0x400E070CU)