30 #ifndef _SAM4S_SPI_INSTANCE_ 31 #define _SAM4S_SPI_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_SPI_CR (0x40008000U) 36 #define REG_SPI_MR (0x40008004U) 37 #define REG_SPI_RDR (0x40008008U) 38 #define REG_SPI_TDR (0x4000800CU) 39 #define REG_SPI_SR (0x40008010U) 40 #define REG_SPI_IER (0x40008014U) 41 #define REG_SPI_IDR (0x40008018U) 42 #define REG_SPI_IMR (0x4000801CU) 43 #define REG_SPI_CSR (0x40008030U) 44 #define REG_SPI_WPMR (0x400080E4U) 45 #define REG_SPI_WPSR (0x400080E8U) 46 #define REG_SPI_RPR (0x40008100U) 47 #define REG_SPI_RCR (0x40008104U) 48 #define REG_SPI_TPR (0x40008108U) 49 #define REG_SPI_TCR (0x4000810CU) 50 #define REG_SPI_RNPR (0x40008110U) 51 #define REG_SPI_RNCR (0x40008114U) 52 #define REG_SPI_TNPR (0x40008118U) 53 #define REG_SPI_TNCR (0x4000811CU) 54 #define REG_SPI_PTCR (0x40008120U) 55 #define REG_SPI_PTSR (0x40008124U) 57 #define REG_SPI_CR (*(WoReg*)0x40008000U) 58 #define REG_SPI_MR (*(RwReg*)0x40008004U) 59 #define REG_SPI_RDR (*(RoReg*)0x40008008U) 60 #define REG_SPI_TDR (*(WoReg*)0x4000800CU) 61 #define REG_SPI_SR (*(RoReg*)0x40008010U) 62 #define REG_SPI_IER (*(WoReg*)0x40008014U) 63 #define REG_SPI_IDR (*(WoReg*)0x40008018U) 64 #define REG_SPI_IMR (*(RoReg*)0x4000801CU) 65 #define REG_SPI_CSR (*(RwReg*)0x40008030U) 66 #define REG_SPI_WPMR (*(RwReg*)0x400080E4U) 67 #define REG_SPI_WPSR (*(RoReg*)0x400080E8U) 68 #define REG_SPI_RPR (*(RwReg*)0x40008100U) 69 #define REG_SPI_RCR (*(RwReg*)0x40008104U) 70 #define REG_SPI_TPR (*(RwReg*)0x40008108U) 71 #define REG_SPI_TCR (*(RwReg*)0x4000810CU) 72 #define REG_SPI_RNPR (*(RwReg*)0x40008110U) 73 #define REG_SPI_RNCR (*(RwReg*)0x40008114U) 74 #define REG_SPI_TNPR (*(RwReg*)0x40008118U) 75 #define REG_SPI_TNCR (*(RwReg*)0x4000811CU) 76 #define REG_SPI_PTCR (*(WoReg*)0x40008120U) 77 #define REG_SPI_PTSR (*(RoReg*)0x40008124U)