Robobo
instance_usart1.h
1 /* ----------------------------------------------------------------------------
2  * SAM Software Package License
3  * ----------------------------------------------------------------------------
4  * Copyright (c) 2012, Atmel Corporation
5  *
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following condition is met:
10  *
11  * - Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the disclaimer below.
13  *
14  * Atmel's name may not be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  * ----------------------------------------------------------------------------
28  */
29 
30 #ifndef _SAM3U_USART1_INSTANCE_
31 #define _SAM3U_USART1_INSTANCE_
32 
33 /* ========== Register definition for USART1 peripheral ========== */
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_USART1_CR (0x40094000U)
36 #define REG_USART1_MR (0x40094004U)
37 #define REG_USART1_IER (0x40094008U)
38 #define REG_USART1_IDR (0x4009400CU)
39 #define REG_USART1_IMR (0x40094010U)
40 #define REG_USART1_CSR (0x40094014U)
41 #define REG_USART1_RHR (0x40094018U)
42 #define REG_USART1_THR (0x4009401CU)
43 #define REG_USART1_BRGR (0x40094020U)
44 #define REG_USART1_RTOR (0x40094024U)
45 #define REG_USART1_TTGR (0x40094028U)
46 #define REG_USART1_FIDI (0x40094040U)
47 #define REG_USART1_NER (0x40094044U)
48 #define REG_USART1_IF (0x4009404CU)
49 #define REG_USART1_MAN (0x40094050U)
50 #define REG_USART1_WPMR (0x400940E4U)
51 #define REG_USART1_WPSR (0x400940E8U)
52 #define REG_USART1_RPR (0x40094100U)
53 #define REG_USART1_RCR (0x40094104U)
54 #define REG_USART1_TPR (0x40094108U)
55 #define REG_USART1_TCR (0x4009410CU)
56 #define REG_USART1_RNPR (0x40094110U)
57 #define REG_USART1_RNCR (0x40094114U)
58 #define REG_USART1_TNPR (0x40094118U)
59 #define REG_USART1_TNCR (0x4009411CU)
60 #define REG_USART1_PTCR (0x40094120U)
61 #define REG_USART1_PTSR (0x40094124U)
62 #else
63 #define REG_USART1_CR (*(WoReg*)0x40094000U)
64 #define REG_USART1_MR (*(RwReg*)0x40094004U)
65 #define REG_USART1_IER (*(WoReg*)0x40094008U)
66 #define REG_USART1_IDR (*(WoReg*)0x4009400CU)
67 #define REG_USART1_IMR (*(RoReg*)0x40094010U)
68 #define REG_USART1_CSR (*(RoReg*)0x40094014U)
69 #define REG_USART1_RHR (*(RoReg*)0x40094018U)
70 #define REG_USART1_THR (*(WoReg*)0x4009401CU)
71 #define REG_USART1_BRGR (*(RwReg*)0x40094020U)
72 #define REG_USART1_RTOR (*(RwReg*)0x40094024U)
73 #define REG_USART1_TTGR (*(RwReg*)0x40094028U)
74 #define REG_USART1_FIDI (*(RwReg*)0x40094040U)
75 #define REG_USART1_NER (*(RoReg*)0x40094044U)
76 #define REG_USART1_IF (*(RwReg*)0x4009404CU)
77 #define REG_USART1_MAN (*(RwReg*)0x40094050U)
78 #define REG_USART1_WPMR (*(RwReg*)0x400940E4U)
79 #define REG_USART1_WPSR (*(RoReg*)0x400940E8U)
80 #define REG_USART1_RPR (*(RwReg*)0x40094100U)
81 #define REG_USART1_RCR (*(RwReg*)0x40094104U)
82 #define REG_USART1_TPR (*(RwReg*)0x40094108U)
83 #define REG_USART1_TCR (*(RwReg*)0x4009410CU)
84 #define REG_USART1_RNPR (*(RwReg*)0x40094110U)
85 #define REG_USART1_RNCR (*(RwReg*)0x40094114U)
86 #define REG_USART1_TNPR (*(RwReg*)0x40094118U)
87 #define REG_USART1_TNCR (*(RwReg*)0x4009411CU)
88 #define REG_USART1_PTCR (*(WoReg*)0x40094120U)
89 #define REG_USART1_PTSR (*(RoReg*)0x40094124U)
90 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
91 
92 #endif /* _SAM3U_USART1_INSTANCE_ */