30 #ifndef _SAM3S8_CRCCU_INSTANCE_ 31 #define _SAM3S8_CRCCU_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_CRCCU_DSCR (0x40044000U) 36 #define REG_CRCCU_DMA_EN (0x40044008U) 37 #define REG_CRCCU_DMA_DIS (0x4004400CU) 38 #define REG_CRCCU_DMA_SR (0x40044010U) 39 #define REG_CRCCU_DMA_IER (0x40044014U) 40 #define REG_CRCCU_DMA_IDR (0x40044018U) 41 #define REG_CRCCU_DMA_IMR (0x4004401CU) 42 #define REG_CRCCU_DMA_ISR (0x40044020U) 43 #define REG_CRCCU_CR (0x40044034U) 44 #define REG_CRCCU_MR (0x40044038U) 45 #define REG_CRCCU_SR (0x4004403CU) 46 #define REG_CRCCU_IER (0x40044040U) 47 #define REG_CRCCU_IDR (0x40044044U) 48 #define REG_CRCCU_IMR (0x40044048U) 49 #define REG_CRCCU_ISR (0x4004404CU) 51 #define REG_CRCCU_DSCR (*(RwReg*)0x40044000U) 52 #define REG_CRCCU_DMA_EN (*(WoReg*)0x40044008U) 53 #define REG_CRCCU_DMA_DIS (*(WoReg*)0x4004400CU) 54 #define REG_CRCCU_DMA_SR (*(RoReg*)0x40044010U) 55 #define REG_CRCCU_DMA_IER (*(WoReg*)0x40044014U) 56 #define REG_CRCCU_DMA_IDR (*(WoReg*)0x40044018U) 57 #define REG_CRCCU_DMA_IMR (*(RoReg*)0x4004401CU) 58 #define REG_CRCCU_DMA_ISR (*(RoReg*)0x40044020U) 59 #define REG_CRCCU_CR (*(WoReg*)0x40044034U) 60 #define REG_CRCCU_MR (*(RwReg*)0x40044038U) 61 #define REG_CRCCU_SR (*(RoReg*)0x4004403CU) 62 #define REG_CRCCU_IER (*(WoReg*)0x40044040U) 63 #define REG_CRCCU_IDR (*(WoReg*)0x40044044U) 64 #define REG_CRCCU_IMR (*(RoReg*)0x40044048U) 65 #define REG_CRCCU_ISR (*(RoReg*)0x4004404CU)