Robobo
instance_ssc.h
1 /* ----------------------------------------------------------------------------
2  * SAM Software Package License
3  * ----------------------------------------------------------------------------
4  * Copyright (c) 2012, Atmel Corporation
5  *
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following condition is met:
10  *
11  * - Redistributions of source code must retain the above copyright notice,
12  * this list of conditions and the disclaimer below.
13  *
14  * Atmel's name may not be used to endorse or promote products derived from
15  * this software without specific prior written permission.
16  *
17  * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20  * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  * ----------------------------------------------------------------------------
28  */
29 
30 #ifndef _SAM3S_SSC_INSTANCE_
31 #define _SAM3S_SSC_INSTANCE_
32 
33 /* ========== Register definition for SSC peripheral ========== */
34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
35 #define REG_SSC_CR (0x40004000U)
36 #define REG_SSC_CMR (0x40004004U)
37 #define REG_SSC_RCMR (0x40004010U)
38 #define REG_SSC_RFMR (0x40004014U)
39 #define REG_SSC_TCMR (0x40004018U)
40 #define REG_SSC_TFMR (0x4000401CU)
41 #define REG_SSC_RHR (0x40004020U)
42 #define REG_SSC_THR (0x40004024U)
43 #define REG_SSC_RSHR (0x40004030U)
44 #define REG_SSC_TSHR (0x40004034U)
45 #define REG_SSC_RC0R (0x40004038U)
46 #define REG_SSC_RC1R (0x4000403CU)
47 #define REG_SSC_SR (0x40004040U)
48 #define REG_SSC_IER (0x40004044U)
49 #define REG_SSC_IDR (0x40004048U)
50 #define REG_SSC_IMR (0x4000404CU)
51 #define REG_SSC_WPMR (0x400040E4U)
52 #define REG_SSC_WPSR (0x400040E8U)
53 #define REG_SSC_RPR (0x40004100U)
54 #define REG_SSC_RCR (0x40004104U)
55 #define REG_SSC_TPR (0x40004108U)
56 #define REG_SSC_TCR (0x4000410CU)
57 #define REG_SSC_RNPR (0x40004110U)
58 #define REG_SSC_RNCR (0x40004114U)
59 #define REG_SSC_TNPR (0x40004118U)
60 #define REG_SSC_TNCR (0x4000411CU)
61 #define REG_SSC_PTCR (0x40004120U)
62 #define REG_SSC_PTSR (0x40004124U)
63 #else
64 #define REG_SSC_CR (*(WoReg*)0x40004000U)
65 #define REG_SSC_CMR (*(RwReg*)0x40004004U)
66 #define REG_SSC_RCMR (*(RwReg*)0x40004010U)
67 #define REG_SSC_RFMR (*(RwReg*)0x40004014U)
68 #define REG_SSC_TCMR (*(RwReg*)0x40004018U)
69 #define REG_SSC_TFMR (*(RwReg*)0x4000401CU)
70 #define REG_SSC_RHR (*(RoReg*)0x40004020U)
71 #define REG_SSC_THR (*(WoReg*)0x40004024U)
72 #define REG_SSC_RSHR (*(RoReg*)0x40004030U)
73 #define REG_SSC_TSHR (*(RwReg*)0x40004034U)
74 #define REG_SSC_RC0R (*(RwReg*)0x40004038U)
75 #define REG_SSC_RC1R (*(RwReg*)0x4000403CU)
76 #define REG_SSC_SR (*(RoReg*)0x40004040U)
77 #define REG_SSC_IER (*(WoReg*)0x40004044U)
78 #define REG_SSC_IDR (*(WoReg*)0x40004048U)
79 #define REG_SSC_IMR (*(RoReg*)0x4000404CU)
80 #define REG_SSC_WPMR (*(RwReg*)0x400040E4U)
81 #define REG_SSC_WPSR (*(RoReg*)0x400040E8U)
82 #define REG_SSC_RPR (*(RwReg*)0x40004100U)
83 #define REG_SSC_RCR (*(RwReg*)0x40004104U)
84 #define REG_SSC_TPR (*(RwReg*)0x40004108U)
85 #define REG_SSC_TCR (*(RwReg*)0x4000410CU)
86 #define REG_SSC_RNPR (*(RwReg*)0x40004110U)
87 #define REG_SSC_RNCR (*(RwReg*)0x40004114U)
88 #define REG_SSC_TNPR (*(RwReg*)0x40004118U)
89 #define REG_SSC_TNCR (*(RwReg*)0x4000411CU)
90 #define REG_SSC_PTCR (*(WoReg*)0x40004120U)
91 #define REG_SSC_PTSR (*(RoReg*)0x40004124U)
92 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
93 
94 #endif /* _SAM3S_SSC_INSTANCE_ */