30 #ifndef _SAM3S8_USART2_INSTANCE_ 31 #define _SAM3S8_USART2_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_USART2_CR (0x4002C000U) 36 #define REG_USART2_MR (0x4002C004U) 37 #define REG_USART2_IER (0x4002C008U) 38 #define REG_USART2_IDR (0x4002C00CU) 39 #define REG_USART2_IMR (0x4002C010U) 40 #define REG_USART2_CSR (0x4002C014U) 41 #define REG_USART2_RHR (0x4002C018U) 42 #define REG_USART2_THR (0x4002C01CU) 43 #define REG_USART2_BRGR (0x4002C020U) 44 #define REG_USART2_RTOR (0x4002C024U) 45 #define REG_USART2_TTGR (0x4002C028U) 46 #define REG_USART2_FIDI (0x4002C040U) 47 #define REG_USART2_NER (0x4002C044U) 48 #define REG_USART2_IF (0x4002C04CU) 49 #define REG_USART2_MAN (0x4002C050U) 50 #define REG_USART2_WPMR (0x4002C0E4U) 51 #define REG_USART2_WPSR (0x4002C0E8U) 52 #define REG_USART2_VERSION (0x4002C0FCU) 53 #define REG_USART2_RPR (0x4002C100U) 54 #define REG_USART2_RCR (0x4002C104U) 55 #define REG_USART2_TPR (0x4002C108U) 56 #define REG_USART2_TCR (0x4002C10CU) 57 #define REG_USART2_RNPR (0x4002C110U) 58 #define REG_USART2_RNCR (0x4002C114U) 59 #define REG_USART2_TNPR (0x4002C118U) 60 #define REG_USART2_TNCR (0x4002C11CU) 61 #define REG_USART2_PTCR (0x4002C120U) 62 #define REG_USART2_PTSR (0x4002C124U) 64 #define REG_USART2_CR (*(WoReg*)0x4002C000U) 65 #define REG_USART2_MR (*(RwReg*)0x4002C004U) 66 #define REG_USART2_IER (*(WoReg*)0x4002C008U) 67 #define REG_USART2_IDR (*(WoReg*)0x4002C00CU) 68 #define REG_USART2_IMR (*(RoReg*)0x4002C010U) 69 #define REG_USART2_CSR (*(RoReg*)0x4002C014U) 70 #define REG_USART2_RHR (*(RoReg*)0x4002C018U) 71 #define REG_USART2_THR (*(WoReg*)0x4002C01CU) 72 #define REG_USART2_BRGR (*(RwReg*)0x4002C020U) 73 #define REG_USART2_RTOR (*(RwReg*)0x4002C024U) 74 #define REG_USART2_TTGR (*(RwReg*)0x4002C028U) 75 #define REG_USART2_FIDI (*(RwReg*)0x4002C040U) 76 #define REG_USART2_NER (*(RoReg*)0x4002C044U) 77 #define REG_USART2_IF (*(RwReg*)0x4002C04CU) 78 #define REG_USART2_MAN (*(RwReg*)0x4002C050U) 79 #define REG_USART2_WPMR (*(RwReg*)0x4002C0E4U) 80 #define REG_USART2_WPSR (*(RoReg*)0x4002C0E8U) 81 #define REG_USART2_VERSION (*(RoReg*)0x4002C0FCU) 82 #define REG_USART2_RPR (*(RwReg*)0x4002C100U) 83 #define REG_USART2_RCR (*(RwReg*)0x4002C104U) 84 #define REG_USART2_TPR (*(RwReg*)0x4002C108U) 85 #define REG_USART2_TCR (*(RwReg*)0x4002C10CU) 86 #define REG_USART2_RNPR (*(RwReg*)0x4002C110U) 87 #define REG_USART2_RNCR (*(RwReg*)0x4002C114U) 88 #define REG_USART2_TNPR (*(RwReg*)0x4002C118U) 89 #define REG_USART2_TNCR (*(RwReg*)0x4002C11CU) 90 #define REG_USART2_PTCR (*(WoReg*)0x4002C120U) 91 #define REG_USART2_PTSR (*(RoReg*)0x4002C124U)