30 #ifndef _SAM3U_ADC12B_INSTANCE_ 31 #define _SAM3U_ADC12B_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_ADC12B_CR (0x400A8000U) 36 #define REG_ADC12B_MR (0x400A8004U) 37 #define REG_ADC12B_CHER (0x400A8010U) 38 #define REG_ADC12B_CHDR (0x400A8014U) 39 #define REG_ADC12B_CHSR (0x400A8018U) 40 #define REG_ADC12B_SR (0x400A801CU) 41 #define REG_ADC12B_LCDR (0x400A8020U) 42 #define REG_ADC12B_IER (0x400A8024U) 43 #define REG_ADC12B_IDR (0x400A8028U) 44 #define REG_ADC12B_IMR (0x400A802CU) 45 #define REG_ADC12B_CDR (0x400A8030U) 46 #define REG_ADC12B_ACR (0x400A8064U) 47 #define REG_ADC12B_EMR (0x400A8068U) 48 #define REG_ADC12B_RPR (0x400A8100U) 49 #define REG_ADC12B_RCR (0x400A8104U) 50 #define REG_ADC12B_RNPR (0x400A8110U) 51 #define REG_ADC12B_RNCR (0x400A8114U) 52 #define REG_ADC12B_PTCR (0x400A8120U) 53 #define REG_ADC12B_PTSR (0x400A8124U) 55 #define REG_ADC12B_CR (*(WoReg*)0x400A8000U) 56 #define REG_ADC12B_MR (*(RwReg*)0x400A8004U) 57 #define REG_ADC12B_CHER (*(WoReg*)0x400A8010U) 58 #define REG_ADC12B_CHDR (*(WoReg*)0x400A8014U) 59 #define REG_ADC12B_CHSR (*(RoReg*)0x400A8018U) 60 #define REG_ADC12B_SR (*(RoReg*)0x400A801CU) 61 #define REG_ADC12B_LCDR (*(RoReg*)0x400A8020U) 62 #define REG_ADC12B_IER (*(WoReg*)0x400A8024U) 63 #define REG_ADC12B_IDR (*(WoReg*)0x400A8028U) 64 #define REG_ADC12B_IMR (*(RoReg*)0x400A802CU) 65 #define REG_ADC12B_CDR (*(RoReg*)0x400A8030U) 66 #define REG_ADC12B_ACR (*(RwReg*)0x400A8064U) 67 #define REG_ADC12B_EMR (*(RwReg*)0x400A8068U) 68 #define REG_ADC12B_RPR (*(RwReg*)0x400A8100U) 69 #define REG_ADC12B_RCR (*(RwReg*)0x400A8104U) 70 #define REG_ADC12B_RNPR (*(RwReg*)0x400A8110U) 71 #define REG_ADC12B_RNCR (*(RwReg*)0x400A8114U) 72 #define REG_ADC12B_PTCR (*(WoReg*)0x400A8120U) 73 #define REG_ADC12B_PTSR (*(RoReg*)0x400A8124U)