30 #ifndef _SAM3XA_EMAC_INSTANCE_ 31 #define _SAM3XA_EMAC_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_EMAC_NCR (0x400B0000U) 36 #define REG_EMAC_NCFGR (0x400B0004U) 37 #define REG_EMAC_NSR (0x400B0008U) 38 #define REG_EMAC_TSR (0x400B0014U) 39 #define REG_EMAC_RBQP (0x400B0018U) 40 #define REG_EMAC_TBQP (0x400B001CU) 41 #define REG_EMAC_RSR (0x400B0020U) 42 #define REG_EMAC_ISR (0x400B0024U) 43 #define REG_EMAC_IER (0x400B0028U) 44 #define REG_EMAC_IDR (0x400B002CU) 45 #define REG_EMAC_IMR (0x400B0030U) 46 #define REG_EMAC_MAN (0x400B0034U) 47 #define REG_EMAC_PTR (0x400B0038U) 48 #define REG_EMAC_PFR (0x400B003CU) 49 #define REG_EMAC_FTO (0x400B0040U) 50 #define REG_EMAC_SCF (0x400B0044U) 51 #define REG_EMAC_MCF (0x400B0048U) 52 #define REG_EMAC_FRO (0x400B004CU) 53 #define REG_EMAC_FCSE (0x400B0050U) 54 #define REG_EMAC_ALE (0x400B0054U) 55 #define REG_EMAC_DTF (0x400B0058U) 56 #define REG_EMAC_LCOL (0x400B005CU) 57 #define REG_EMAC_ECOL (0x400B0060U) 58 #define REG_EMAC_TUND (0x400B0064U) 59 #define REG_EMAC_CSE (0x400B0068U) 60 #define REG_EMAC_RRE (0x400B006CU) 61 #define REG_EMAC_ROV (0x400B0070U) 62 #define REG_EMAC_RSE (0x400B0074U) 63 #define REG_EMAC_ELE (0x400B0078U) 64 #define REG_EMAC_RJA (0x400B007CU) 65 #define REG_EMAC_USF (0x400B0080U) 66 #define REG_EMAC_STE (0x400B0084U) 67 #define REG_EMAC_RLE (0x400B0088U) 68 #define REG_EMAC_HRB (0x400B0090U) 69 #define REG_EMAC_HRT (0x400B0094U) 70 #define REG_EMAC_SA1B (0x400B0098U) 71 #define REG_EMAC_SA1T (0x400B009CU) 72 #define REG_EMAC_SA2B (0x400B00A0U) 73 #define REG_EMAC_SA2T (0x400B00A4U) 74 #define REG_EMAC_SA3B (0x400B00A8U) 75 #define REG_EMAC_SA3T (0x400B00ACU) 76 #define REG_EMAC_SA4B (0x400B00B0U) 77 #define REG_EMAC_SA4T (0x400B00B4U) 78 #define REG_EMAC_TID (0x400B00B8U) 79 #define REG_EMAC_USRIO (0x400B00C0U) 81 #define REG_EMAC_NCR (*(RwReg*)0x400B0000U) 82 #define REG_EMAC_NCFGR (*(RwReg*)0x400B0004U) 83 #define REG_EMAC_NSR (*(RoReg*)0x400B0008U) 84 #define REG_EMAC_TSR (*(RwReg*)0x400B0014U) 85 #define REG_EMAC_RBQP (*(RwReg*)0x400B0018U) 86 #define REG_EMAC_TBQP (*(RwReg*)0x400B001CU) 87 #define REG_EMAC_RSR (*(RwReg*)0x400B0020U) 88 #define REG_EMAC_ISR (*(RwReg*)0x400B0024U) 89 #define REG_EMAC_IER (*(WoReg*)0x400B0028U) 90 #define REG_EMAC_IDR (*(WoReg*)0x400B002CU) 91 #define REG_EMAC_IMR (*(RoReg*)0x400B0030U) 92 #define REG_EMAC_MAN (*(RwReg*)0x400B0034U) 93 #define REG_EMAC_PTR (*(RwReg*)0x400B0038U) 94 #define REG_EMAC_PFR (*(RwReg*)0x400B003CU) 95 #define REG_EMAC_FTO (*(RwReg*)0x400B0040U) 96 #define REG_EMAC_SCF (*(RwReg*)0x400B0044U) 97 #define REG_EMAC_MCF (*(RwReg*)0x400B0048U) 98 #define REG_EMAC_FRO (*(RwReg*)0x400B004CU) 99 #define REG_EMAC_FCSE (*(RwReg*)0x400B0050U) 100 #define REG_EMAC_ALE (*(RwReg*)0x400B0054U) 101 #define REG_EMAC_DTF (*(RwReg*)0x400B0058U) 102 #define REG_EMAC_LCOL (*(RwReg*)0x400B005CU) 103 #define REG_EMAC_ECOL (*(RwReg*)0x400B0060U) 104 #define REG_EMAC_TUND (*(RwReg*)0x400B0064U) 105 #define REG_EMAC_CSE (*(RwReg*)0x400B0068U) 106 #define REG_EMAC_RRE (*(RwReg*)0x400B006CU) 107 #define REG_EMAC_ROV (*(RwReg*)0x400B0070U) 108 #define REG_EMAC_RSE (*(RwReg*)0x400B0074U) 109 #define REG_EMAC_ELE (*(RwReg*)0x400B0078U) 110 #define REG_EMAC_RJA (*(RwReg*)0x400B007CU) 111 #define REG_EMAC_USF (*(RwReg*)0x400B0080U) 112 #define REG_EMAC_STE (*(RwReg*)0x400B0084U) 113 #define REG_EMAC_RLE (*(RwReg*)0x400B0088U) 114 #define REG_EMAC_HRB (*(RwReg*)0x400B0090U) 115 #define REG_EMAC_HRT (*(RwReg*)0x400B0094U) 116 #define REG_EMAC_SA1B (*(RwReg*)0x400B0098U) 117 #define REG_EMAC_SA1T (*(RwReg*)0x400B009CU) 118 #define REG_EMAC_SA2B (*(RwReg*)0x400B00A0U) 119 #define REG_EMAC_SA2T (*(RwReg*)0x400B00A4U) 120 #define REG_EMAC_SA3B (*(RwReg*)0x400B00A8U) 121 #define REG_EMAC_SA3T (*(RwReg*)0x400B00ACU) 122 #define REG_EMAC_SA4B (*(RwReg*)0x400B00B0U) 123 #define REG_EMAC_SA4T (*(RwReg*)0x400B00B4U) 124 #define REG_EMAC_TID (*(RwReg*)0x400B00B8U) 125 #define REG_EMAC_USRIO (*(RwReg*)0x400B00C0U)