30 #ifndef _SAM3XA_PIOF_INSTANCE_ 31 #define _SAM3XA_PIOF_INSTANCE_ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_PIOF_PER (0x400E1800U) 36 #define REG_PIOF_PDR (0x400E1804U) 37 #define REG_PIOF_PSR (0x400E1808U) 38 #define REG_PIOF_OER (0x400E1810U) 39 #define REG_PIOF_ODR (0x400E1814U) 40 #define REG_PIOF_OSR (0x400E1818U) 41 #define REG_PIOF_IFER (0x400E1820U) 42 #define REG_PIOF_IFDR (0x400E1824U) 43 #define REG_PIOF_IFSR (0x400E1828U) 44 #define REG_PIOF_SODR (0x400E1830U) 45 #define REG_PIOF_CODR (0x400E1834U) 46 #define REG_PIOF_ODSR (0x400E1838U) 47 #define REG_PIOF_PDSR (0x400E183CU) 48 #define REG_PIOF_IER (0x400E1840U) 49 #define REG_PIOF_IDR (0x400E1844U) 50 #define REG_PIOF_IMR (0x400E1848U) 51 #define REG_PIOF_ISR (0x400E184CU) 52 #define REG_PIOF_MDER (0x400E1850U) 53 #define REG_PIOF_MDDR (0x400E1854U) 54 #define REG_PIOF_MDSR (0x400E1858U) 55 #define REG_PIOF_PUDR (0x400E1860U) 56 #define REG_PIOF_PUER (0x400E1864U) 57 #define REG_PIOF_PUSR (0x400E1868U) 58 #define REG_PIOF_ABSR (0x400E1870U) 59 #define REG_PIOF_SCIFSR (0x400E1880U) 60 #define REG_PIOF_DIFSR (0x400E1884U) 61 #define REG_PIOF_IFDGSR (0x400E1888U) 62 #define REG_PIOF_SCDR (0x400E188CU) 63 #define REG_PIOF_OWER (0x400E18A0U) 64 #define REG_PIOF_OWDR (0x400E18A4U) 65 #define REG_PIOF_OWSR (0x400E18A8U) 66 #define REG_PIOF_AIMER (0x400E18B0U) 67 #define REG_PIOF_AIMDR (0x400E18B4U) 68 #define REG_PIOF_AIMMR (0x400E18B8U) 69 #define REG_PIOF_ESR (0x400E18C0U) 70 #define REG_PIOF_LSR (0x400E18C4U) 71 #define REG_PIOF_ELSR (0x400E18C8U) 72 #define REG_PIOF_FELLSR (0x400E18D0U) 73 #define REG_PIOF_REHLSR (0x400E18D4U) 74 #define REG_PIOF_FRLHSR (0x400E18D8U) 75 #define REG_PIOF_LOCKSR (0x400E18E0U) 76 #define REG_PIOF_WPMR (0x400E18E4U) 77 #define REG_PIOF_WPSR (0x400E18E8U) 79 #define REG_PIOF_PER (*(WoReg*)0x400E1800U) 80 #define REG_PIOF_PDR (*(WoReg*)0x400E1804U) 81 #define REG_PIOF_PSR (*(RoReg*)0x400E1808U) 82 #define REG_PIOF_OER (*(WoReg*)0x400E1810U) 83 #define REG_PIOF_ODR (*(WoReg*)0x400E1814U) 84 #define REG_PIOF_OSR (*(RoReg*)0x400E1818U) 85 #define REG_PIOF_IFER (*(WoReg*)0x400E1820U) 86 #define REG_PIOF_IFDR (*(WoReg*)0x400E1824U) 87 #define REG_PIOF_IFSR (*(RoReg*)0x400E1828U) 88 #define REG_PIOF_SODR (*(WoReg*)0x400E1830U) 89 #define REG_PIOF_CODR (*(WoReg*)0x400E1834U) 90 #define REG_PIOF_ODSR (*(RwReg*)0x400E1838U) 91 #define REG_PIOF_PDSR (*(RoReg*)0x400E183CU) 92 #define REG_PIOF_IER (*(WoReg*)0x400E1840U) 93 #define REG_PIOF_IDR (*(WoReg*)0x400E1844U) 94 #define REG_PIOF_IMR (*(RoReg*)0x400E1848U) 95 #define REG_PIOF_ISR (*(RoReg*)0x400E184CU) 96 #define REG_PIOF_MDER (*(WoReg*)0x400E1850U) 97 #define REG_PIOF_MDDR (*(WoReg*)0x400E1854U) 98 #define REG_PIOF_MDSR (*(RoReg*)0x400E1858U) 99 #define REG_PIOF_PUDR (*(WoReg*)0x400E1860U) 100 #define REG_PIOF_PUER (*(WoReg*)0x400E1864U) 101 #define REG_PIOF_PUSR (*(RoReg*)0x400E1868U) 102 #define REG_PIOF_ABSR (*(RwReg*)0x400E1870U) 103 #define REG_PIOF_SCIFSR (*(WoReg*)0x400E1880U) 104 #define REG_PIOF_DIFSR (*(WoReg*)0x400E1884U) 105 #define REG_PIOF_IFDGSR (*(RoReg*)0x400E1888U) 106 #define REG_PIOF_SCDR (*(RwReg*)0x400E188CU) 107 #define REG_PIOF_OWER (*(WoReg*)0x400E18A0U) 108 #define REG_PIOF_OWDR (*(WoReg*)0x400E18A4U) 109 #define REG_PIOF_OWSR (*(RoReg*)0x400E18A8U) 110 #define REG_PIOF_AIMER (*(WoReg*)0x400E18B0U) 111 #define REG_PIOF_AIMDR (*(WoReg*)0x400E18B4U) 112 #define REG_PIOF_AIMMR (*(RoReg*)0x400E18B8U) 113 #define REG_PIOF_ESR (*(WoReg*)0x400E18C0U) 114 #define REG_PIOF_LSR (*(WoReg*)0x400E18C4U) 115 #define REG_PIOF_ELSR (*(RoReg*)0x400E18C8U) 116 #define REG_PIOF_FELLSR (*(WoReg*)0x400E18D0U) 117 #define REG_PIOF_REHLSR (*(WoReg*)0x400E18D4U) 118 #define REG_PIOF_FRLHSR (*(RoReg*)0x400E18D8U) 119 #define REG_PIOF_LOCKSR (*(RoReg*)0x400E18E0U) 120 #define REG_PIOF_WPMR (*(RwReg*)0x400E18E4U) 121 #define REG_PIOF_WPSR (*(RoReg*)0x400E18E8U)