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Robobo
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Public Attributes | |
| RwReg | EMAC_NCR |
| (Emac Offset: 0x00) Network Control Register | |
| RwReg | EMAC_NCFGR |
| (Emac Offset: 0x04) Network Configuration Register | |
| RoReg | EMAC_NSR |
| (Emac Offset: 0x08) Network Status Register | |
| RoReg | Reserved1 [2] |
| RwReg | EMAC_TSR |
| (Emac Offset: 0x14) Transmit Status Register | |
| RwReg | EMAC_RBQP |
| (Emac Offset: 0x18) Receive Buffer Queue Pointer Register | |
| RwReg | EMAC_TBQP |
| (Emac Offset: 0x1C) Transmit Buffer Queue Pointer Register | |
| RwReg | EMAC_RSR |
| (Emac Offset: 0x20) Receive Status Register | |
| RwReg | EMAC_ISR |
| (Emac Offset: 0x24) Interrupt Status Register | |
| WoReg | EMAC_IER |
| (Emac Offset: 0x28) Interrupt Enable Register | |
| WoReg | EMAC_IDR |
| (Emac Offset: 0x2C) Interrupt Disable Register | |
| RoReg | EMAC_IMR |
| (Emac Offset: 0x30) Interrupt Mask Register | |
| RwReg | EMAC_MAN |
| (Emac Offset: 0x34) Phy Maintenance Register | |
| RwReg | EMAC_PTR |
| (Emac Offset: 0x38) Pause Time Register | |
| RwReg | EMAC_PFR |
| (Emac Offset: 0x3C) Pause Frames Received Register | |
| RwReg | EMAC_FTO |
| (Emac Offset: 0x40) Frames Transmitted Ok Register | |
| RwReg | EMAC_SCF |
| (Emac Offset: 0x44) Single Collision Frames Register | |
| RwReg | EMAC_MCF |
| (Emac Offset: 0x48) Multiple Collision Frames Register | |
| RwReg | EMAC_FRO |
| (Emac Offset: 0x4C) Frames Received Ok Register | |
| RwReg | EMAC_FCSE |
| (Emac Offset: 0x50) Frame Check Sequence Errors Register | |
| RwReg | EMAC_ALE |
| (Emac Offset: 0x54) Alignment Errors Register | |
| RwReg | EMAC_DTF |
| (Emac Offset: 0x58) Deferred Transmission Frames Register | |
| RwReg | EMAC_LCOL |
| (Emac Offset: 0x5C) Late Collisions Register | |
| RwReg | EMAC_ECOL |
| (Emac Offset: 0x60) Excessive Collisions Register | |
| RwReg | EMAC_TUND |
| (Emac Offset: 0x64) Transmit Underrun Errors Register | |
| RwReg | EMAC_CSE |
| (Emac Offset: 0x68) Carrier Sense Errors Register | |
| RwReg | EMAC_RRE |
| (Emac Offset: 0x6C) Receive Resource Errors Register | |
| RwReg | EMAC_ROV |
| (Emac Offset: 0x70) Receive Overrun Errors Register | |
| RwReg | EMAC_RSE |
| (Emac Offset: 0x74) Receive Symbol Errors Register | |
| RwReg | EMAC_ELE |
| (Emac Offset: 0x78) Excessive Length Errors Register | |
| RwReg | EMAC_RJA |
| (Emac Offset: 0x7C) Receive Jabbers Register | |
| RwReg | EMAC_USF |
| (Emac Offset: 0x80) Undersize Frames Register | |
| RwReg | EMAC_STE |
| (Emac Offset: 0x84) SQE Test Errors Register | |
| RwReg | EMAC_RLE |
| (Emac Offset: 0x88) Received Length Field Mismatch Register | |
| RoReg | Reserved2 [1] |
| RwReg | EMAC_HRB |
| (Emac Offset: 0x90) Hash Register Bottom [31:0] Register | |
| RwReg | EMAC_HRT |
| (Emac Offset: 0x94) Hash Register Top [63:32] Register | |
| EmacSa | EMAC_SA [EMACSA_NUMBER] |
| (Emac Offset: 0x98) sa = 1 .. 4 | |
| RwReg | EMAC_TID |
| (Emac Offset: 0xB8) Type ID Checking Register | |
| RoReg | Reserved3 [1] |
| RwReg | EMAC_USRIO |
| (Emac Offset: 0xC0) User Input/Output Register | |
1.8.11 
