ssc.h

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#ifndef SSC_H_INCLUDED
#define SSC_H_INCLUDED

#include "../chip.h"


#ifdef __cplusplus
extern "C" {
#endif


#define SSC_RX_STOP_COMPARE_0        0
#define SSC_RX_STOP_COMPARE_0_1      1

#define COMPARE_ID0                  0
#define COMPARE_ID1                  1

#define SSC_DEFAULT_TIMEOUT          10000

enum ssc_return_code {
    SSC_RC_OK = 0,              
    SSC_RC_YES = 0,             
    SSC_RC_NO = 1,              
    SSC_RC_ERROR = 1,           
    SSC_RC_INVALID = 0xFFFFFFFF 
};

typedef struct {
    uint32_t ul_datlen;
    uint32_t ul_msbf;
    uint32_t ul_datnb;
    uint32_t ul_fslen;
    uint32_t ul_fslen_ext;
    uint32_t ul_fsos;
    uint32_t ul_fsedge;
} data_frame_opt_t;

typedef struct {
    uint32_t ul_cks;
    uint32_t ul_cko;
    uint32_t ul_cki;
    uint32_t ul_ckg;
    uint32_t ul_period;
    uint32_t ul_sttdly;
    uint32_t ul_start_sel;
} clock_opt_t;

#define SSC_I2S_MASTER_OUT    (1 << 0) 
#define SSC_I2S_MASTER_IN     (1 << 1) 
#define SSC_I2S_SLAVE_OUT     (1 << 2) 
#define SSC_I2S_SLAVE_IN      (1 << 3) 

#define SSC_AUDIO_CH_LEFT     (1 << 0)
#define SSC_AUDIO_CH_RIGHT    (1 << 1)
enum {
    SSC_AUDIO_MONO_LEFT = (SSC_AUDIO_CH_LEFT),
    SSC_AUDIO_MONO_RIGHT = (SSC_AUDIO_CH_RIGHT),
    SSC_AUDIO_STERO = (SSC_AUDIO_CH_LEFT | SSC_AUDIO_CH_RIGHT)
};

uint32_t ssc_set_clock_divider(Ssc *p_ssc, uint32_t ul_bitclock, uint32_t ul_mck);
void ssc_i2s_set_transmitter(Ssc *p_ssc, uint32_t ul_mode,
        uint32_t ul_cks, uint32_t ul_ch_mode, uint32_t ul_datlen);
void ssc_i2s_set_receiver(Ssc *p_ssc, uint32_t ul_mode,
        uint32_t ul_cks, uint32_t ul_ch_mode, uint32_t ul_datlen);
void ssc_reset(Ssc *p_ssc);
void ssc_enable_rx(Ssc *p_ssc);
void ssc_disable_rx(Ssc *p_ssc);
void ssc_enable_tx(Ssc *p_ssc);
void ssc_disable_tx(Ssc *p_ssc);
void ssc_set_normal_mode(Ssc *p_ssc);
void ssc_set_loop_mode(Ssc *p_ssc);
void ssc_set_rx_stop_selection(Ssc *p_ssc, uint32_t ul_sel);
void ssc_set_td_default_level(Ssc *p_ssc, uint32_t ul_level);
void ssc_enable_tx_frame_sync_data(Ssc *p_ssc);
void ssc_disable_tx_frame_sync_data(Ssc *p_ssc);
void ssc_set_receiver(Ssc *p_ssc, clock_opt_t *p_rx_clk_opt, data_frame_opt_t *p_rx_data_frame);
void ssc_set_transmitter(Ssc *p_ssc, clock_opt_t *p_tx_clk_opt, data_frame_opt_t *p_tx_data_frame);
void ssc_set_rx_compare(Ssc *p_ssc, uint32_t ul_id, uint32_t ul_value);
uint32_t ssc_get_rx_compare(Ssc *p_ssc, uint32_t ul_id);
void ssc_enable_interrupt(Ssc *p_ssc, uint32_t ul_sources);
void ssc_disable_interrupt(Ssc *p_ssc, uint32_t ul_sources);
uint32_t ssc_get_interrupt_mask(Ssc *p_ssc);
uint32_t ssc_get_status(Ssc *p_ssc);
uint32_t ssc_is_tx_ready(Ssc *p_ssc);
uint32_t ssc_is_tx_empty(Ssc *p_ssc);
uint32_t ssc_is_rx_ready(Ssc *p_ssc);
uint32_t ssc_is_tx_enabled(Ssc *p_ssc);
uint32_t ssc_is_rx_enabled(Ssc *p_ssc);
#if (defined _SAM3S_) || (defined _SAM4S_)
uint32_t ssc_is_rx_buf_end(Ssc *p_ssc);
uint32_t ssc_is_tx_buf_end(Ssc *p_ssc);
uint32_t ssc_is_rx_buf_full(Ssc *p_ssc);
uint32_t ssc_is_tx_buf_empty(Ssc *p_ssc);
Pdc *ssc_get_pdc_base(Ssc *p_ssc);
#endif
uint32_t ssc_write(Ssc *p_ssc, uint32_t ul_frame);
uint32_t ssc_read(Ssc *p_ssc, uint32_t *ul_data);
void ssc_write_sync_data(Ssc *p_ssc, uint32_t ul_frame);
uint32_t ssc_read_sync_data(Ssc *p_ssc);
#if ((defined _SAM3XA_) || (defined _SAM3U_))
void *ssc_get_tx_access(Ssc *p_ssc);
void *ssc_get_rx_access(Ssc *p_ssc);
#endif
void ssc_set_writeprotect(Ssc *p_ssc, uint32_t ul_enable);
uint32_t ssc_get_writeprotect_status(Ssc *p_ssc);


#ifdef __cplusplus
}
#endif


#endif /* SSC_H_INCLUDED */