Classes
struct	SCnSCB_Type
	Structure type to access the System Control and ID Register not in the SCB. More...

Macros
#define	SCnSCB_ICTR_INTLINESNUM_Pos 0

#define	SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)

#define	SCnSCB_ACTLR_DISFOLD_Pos 2

#define	SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

#define	SCnSCB_ACTLR_DISDEFWBUF_Pos 1

#define	SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

#define	SCnSCB_ACTLR_DISMCYCINT_Pos 0

#define	SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

#define	SCnSCB_ICTR_INTLINESNUM_Pos 0

#define	SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)

#define	SCnSCB_ACTLR_DISOOFP_Pos 9

#define	SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos)

#define	SCnSCB_ACTLR_DISFPCA_Pos 8

#define	SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos)

#define	SCnSCB_ACTLR_DISFOLD_Pos 2

#define	SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

#define	SCnSCB_ACTLR_DISDEFWBUF_Pos 1

#define	SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

#define	SCnSCB_ACTLR_DISMCYCINT_Pos 0

#define	SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

Detailed Description

Type definitions for the Cortex-M System Control and ID Register not in the SCB

Macro Definition Documentation

#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

ACTLR: DISDEFWBUF Mask

#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)

ACTLR: DISDEFWBUF Mask

#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1

ACTLR: DISDEFWBUF Position

#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1

ACTLR: DISDEFWBUF Position

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos)

ACTLR: DISFOLD Mask

#define SCnSCB_ACTLR_DISFOLD_Pos 2

ACTLR: DISFOLD Position

#define SCnSCB_ACTLR_DISFOLD_Pos 2

ACTLR: DISFOLD Position

#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos)

ACTLR: DISFPCA Mask

#define SCnSCB_ACTLR_DISFPCA_Pos 8

ACTLR: DISFPCA Position

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

ACTLR: DISMCYCINT Mask

#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos)

ACTLR: DISMCYCINT Mask

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0

ACTLR: DISMCYCINT Position

#define SCnSCB_ACTLR_DISMCYCINT_Pos 0

ACTLR: DISMCYCINT Position

#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos)

ACTLR: DISOOFP Mask

#define SCnSCB_ACTLR_DISOOFP_Pos 9

ACTLR: DISOOFP Position

#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)

ICTR: INTLINESNUM Mask

#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos)

ICTR: INTLINESNUM Mask

#define SCnSCB_ICTR_INTLINESNUM_Pos 0

ICTR: INTLINESNUM Position

#define SCnSCB_ICTR_INTLINESNUM_Pos 0

ICTR: INTLINESNUM Position