Classes
struct	Acc
	Acc hardware registers. More...

Macros
#define	ACC_CR_SWRST (0x1u << 0)
	(ACC_CR) SoftWare ReSeT

#define	ACC_MR_SELMINUS_Pos 0

#define	ACC_MR_SELMINUS_Msk (0x7u << ACC_MR_SELMINUS_Pos)
	(ACC_MR) SELection for MINUS comparator input

#define	ACC_MR_SELMINUS_TS (0x0u << 0)
	(ACC_MR) SelectTS

#define	ACC_MR_SELMINUS_ADVREF (0x1u << 0)
	(ACC_MR) Select ADVREF

#define	ACC_MR_SELMINUS_DAC0 (0x2u << 0)
	(ACC_MR) Select DAC0

#define	ACC_MR_SELMINUS_DAC1 (0x3u << 0)
	(ACC_MR) Select DAC1

#define	ACC_MR_SELMINUS_AD0 (0x4u << 0)
	(ACC_MR) Select AD0

#define	ACC_MR_SELMINUS_AD1 (0x5u << 0)
	(ACC_MR) Select AD1

#define	ACC_MR_SELMINUS_AD2 (0x6u << 0)
	(ACC_MR) Select AD2

#define	ACC_MR_SELMINUS_AD3 (0x7u << 0)
	(ACC_MR) Select AD3

#define	ACC_MR_SELPLUS_Pos 4

#define	ACC_MR_SELPLUS_Msk (0x7u << ACC_MR_SELPLUS_Pos)
	(ACC_MR) SELection for PLUS comparator input

#define	ACC_MR_SELPLUS_AD0 (0x0u << 4)
	(ACC_MR) Select AD0

#define	ACC_MR_SELPLUS_AD1 (0x1u << 4)
	(ACC_MR) Select AD1

#define	ACC_MR_SELPLUS_AD2 (0x2u << 4)
	(ACC_MR) Select AD2

#define	ACC_MR_SELPLUS_AD3 (0x3u << 4)
	(ACC_MR) Select AD3

#define	ACC_MR_SELPLUS_AD4 (0x4u << 4)
	(ACC_MR) Select AD4

#define	ACC_MR_SELPLUS_AD5 (0x5u << 4)
	(ACC_MR) Select AD5

#define	ACC_MR_SELPLUS_AD6 (0x6u << 4)
	(ACC_MR) Select AD6

#define	ACC_MR_SELPLUS_AD7 (0x7u << 4)
	(ACC_MR) Select AD7

#define	ACC_MR_ACEN (0x1u << 8)
	(ACC_MR) Analog Comparator ENable

#define	ACC_MR_ACEN_DIS (0x0u << 8)
	(ACC_MR) Analog Comparator Disabled.

#define	ACC_MR_ACEN_EN (0x1u << 8)
	(ACC_MR) Analog Comparator Enabled.

#define	ACC_MR_EDGETYP_Pos 9

#define	ACC_MR_EDGETYP_Msk (0x3u << ACC_MR_EDGETYP_Pos)
	(ACC_MR) EDGE TYPe

#define	ACC_MR_EDGETYP_RISING (0x0u << 9)
	(ACC_MR) only rising edge of comparator output

#define	ACC_MR_EDGETYP_FALLING (0x1u << 9)
	(ACC_MR) falling edge of comparator output

#define	ACC_MR_EDGETYP_ANY (0x2u << 9)
	(ACC_MR) any edge of comparator output

#define	ACC_MR_INV (0x1u << 12)
	(ACC_MR) INVert comparator output

#define	ACC_MR_INV_DIS (0x0u << 12)
	(ACC_MR) Analog Comparator output is directly processed.

#define	ACC_MR_INV_EN (0x1u << 12)
	(ACC_MR) Analog Comparator output is inverted prior to being processed.

#define	ACC_MR_SELFS (0x1u << 13)
	(ACC_MR) SELection of Fault Source

#define	ACC_MR_SELFS_CF (0x0u << 13)
	(ACC_MR) the CF flag is used to drive the FAULT output.

#define	ACC_MR_SELFS_OUTPUT (0x1u << 13)
	(ACC_MR) the output of the Analog Comparator flag is used to drive the FAULT output.

#define	ACC_MR_FE (0x1u << 14)
	(ACC_MR) Fault Enable

#define	ACC_MR_FE_DIS (0x0u << 14)
	(ACC_MR) the FAULT output is tied to 0.

#define	ACC_MR_FE_EN (0x1u << 14)
	(ACC_MR) the FAULT output is driven by the signal defined by SELFS.

#define	ACC_IER_CE (0x1u << 0)
	(ACC_IER) Comparison Edge

#define	ACC_IDR_CE (0x1u << 0)
	(ACC_IDR) Comparison Edge

#define	ACC_IMR_CE (0x1u << 0)
	(ACC_IMR) Comparison Edge

#define	ACC_ISR_CE (0x1u << 0)
	(ACC_ISR) Comparison Edge

#define	ACC_ISR_SCO (0x1u << 1)
	(ACC_ISR) Synchronized Comparator Output

#define	ACC_ISR_MASK (0x1u << 31)
	(ACC_ISR)

#define	ACC_ACR_ISEL (0x1u << 0)
	(ACC_ACR) Current SELection

#define	ACC_ACR_ISEL_LOPW (0x0u << 0)
	(ACC_ACR) low power option.

#define	ACC_ACR_ISEL_HISP (0x1u << 0)
	(ACC_ACR) high speed option.

#define	ACC_ACR_HYST_Pos 1

#define	ACC_ACR_HYST_Msk (0x3u << ACC_ACR_HYST_Pos)
	(ACC_ACR) HYSTeresis selection

#define	ACC_ACR_HYST(value) ((ACC_ACR_HYST_Msk & ((value) << ACC_ACR_HYST_Pos)))

#define	ACC_WPMR_WPEN (0x1u << 0)
	(ACC_WPMR) Write Protect Enable

#define	ACC_WPMR_WPKEY_Pos 8

#define	ACC_WPMR_WPKEY_Msk (0xffffffu << ACC_WPMR_WPKEY_Pos)
	(ACC_WPMR) Write Protect KEY

#define	ACC_WPMR_WPKEY(value) ((ACC_WPMR_WPKEY_Msk & ((value) << ACC_WPMR_WPKEY_Pos)))

#define	ACC_WPSR_WPROTERR (0x1u << 0)
	(ACC_WPSR) Write PROTection ERRor

Detailed Description

SOFTWARE API DEFINITION FOR Analog Comparator Controller

Classes

Macros

Detailed Description