Classes
struct	Pdc
	Pdc hardware registers. More...

Macros
#define	PERIPH_RPR_RXPTR_Pos 0

#define	PERIPH_RPR_RXPTR_Msk (0xffffffffu << PERIPH_RPR_RXPTR_Pos)
	(PERIPH_RPR) Receive Pointer Register

#define	PERIPH_RPR_RXPTR(value) ((PERIPH_RPR_RXPTR_Msk & ((value) << PERIPH_RPR_RXPTR_Pos)))

#define	PERIPH_RCR_RXCTR_Pos 0

#define	PERIPH_RCR_RXCTR_Msk (0xffffu << PERIPH_RCR_RXCTR_Pos)
	(PERIPH_RCR) Receive Counter Register

#define	PERIPH_RCR_RXCTR(value) ((PERIPH_RCR_RXCTR_Msk & ((value) << PERIPH_RCR_RXCTR_Pos)))

#define	PERIPH_TPR_TXPTR_Pos 0

#define	PERIPH_TPR_TXPTR_Msk (0xffffffffu << PERIPH_TPR_TXPTR_Pos)
	(PERIPH_TPR) Transmit Counter Register

#define	PERIPH_TPR_TXPTR(value) ((PERIPH_TPR_TXPTR_Msk & ((value) << PERIPH_TPR_TXPTR_Pos)))

#define	PERIPH_TCR_TXCTR_Pos 0

#define	PERIPH_TCR_TXCTR_Msk (0xffffu << PERIPH_TCR_TXCTR_Pos)
	(PERIPH_TCR) Transmit Counter Register

#define	PERIPH_TCR_TXCTR(value) ((PERIPH_TCR_TXCTR_Msk & ((value) << PERIPH_TCR_TXCTR_Pos)))

#define	PERIPH_RNPR_RXNPTR_Pos 0

#define	PERIPH_RNPR_RXNPTR_Msk (0xffffffffu << PERIPH_RNPR_RXNPTR_Pos)
	(PERIPH_RNPR) Receive Next Pointer

#define	PERIPH_RNPR_RXNPTR(value) ((PERIPH_RNPR_RXNPTR_Msk & ((value) << PERIPH_RNPR_RXNPTR_Pos)))

#define	PERIPH_RNCR_RXNCTR_Pos 0

#define	PERIPH_RNCR_RXNCTR_Msk (0xffffu << PERIPH_RNCR_RXNCTR_Pos)
	(PERIPH_RNCR) Receive Next Counter

#define	PERIPH_RNCR_RXNCTR(value) ((PERIPH_RNCR_RXNCTR_Msk & ((value) << PERIPH_RNCR_RXNCTR_Pos)))

#define	PERIPH_TNPR_TXNPTR_Pos 0

#define	PERIPH_TNPR_TXNPTR_Msk (0xffffffffu << PERIPH_TNPR_TXNPTR_Pos)
	(PERIPH_TNPR) Transmit Next Pointer

#define	PERIPH_TNPR_TXNPTR(value) ((PERIPH_TNPR_TXNPTR_Msk & ((value) << PERIPH_TNPR_TXNPTR_Pos)))

#define	PERIPH_TNCR_TXNCTR_Pos 0

#define	PERIPH_TNCR_TXNCTR_Msk (0xffffu << PERIPH_TNCR_TXNCTR_Pos)
	(PERIPH_TNCR) Transmit Counter Next

#define	PERIPH_TNCR_TXNCTR(value) ((PERIPH_TNCR_TXNCTR_Msk & ((value) << PERIPH_TNCR_TXNCTR_Pos)))

#define	PERIPH_PTCR_RXTEN (0x1u << 0)
	(PERIPH_PTCR) Receiver Transfer Enable

#define	PERIPH_PTCR_RXTDIS (0x1u << 1)
	(PERIPH_PTCR) Receiver Transfer Disable

#define	PERIPH_PTCR_TXTEN (0x1u << 8)
	(PERIPH_PTCR) Transmitter Transfer Enable

#define	PERIPH_PTCR_TXTDIS (0x1u << 9)
	(PERIPH_PTCR) Transmitter Transfer Disable

#define	PERIPH_PTSR_RXTEN (0x1u << 0)
	(PERIPH_PTSR) Receiver Transfer Enable

#define	PERIPH_PTSR_TXTEN (0x1u << 8)
	(PERIPH_PTSR) Transmitter Transfer Enable

Detailed Description

SOFTWARE API DEFINITION FOR Peripheral DMA Controller

Classes

Macros

Detailed Description