Matrix hardware registers. More...

#include <component_matrix.h>

Public Attributes
RwReg	MATRIX_MCFG [3]
	(Matrix Offset: 0x0000) Master Configuration Register

RoReg	Reserved1 [13]

RwReg	MATRIX_SCFG [4]
	(Matrix Offset: 0x0040) Slave Configuration Register

RoReg	Reserved2 [12]

RwReg	MATRIX_PRAS0
	(Matrix Offset: 0x0080) Priority Register A for Slave 0

RoReg	Reserved3 [1]

RwReg	MATRIX_PRAS1
	(Matrix Offset: 0x0088) Priority Register A for Slave 1

RoReg	Reserved4 [1]

RwReg	MATRIX_PRAS2
	(Matrix Offset: 0x0090) Priority Register A for Slave 2

RoReg	Reserved5 [1]

RwReg	MATRIX_PRAS3
	(Matrix Offset: 0x0098) Priority Register A for Slave 3

RoReg	Reserved6 [1]

RoReg	Reserved7 [29]

RwReg	CCFG_SYSIO
	(Matrix Offset: 0x0114) System I/O Configuration register

RoReg	Reserved8 [51]

RwReg	MATRIX_WPMR
	(Matrix Offset: 0x1E4) Write Protect Mode Register

RoReg	MATRIX_WPSR
	(Matrix Offset: 0x1E8) Write Protect Status Register

RwReg	MATRIX_PRAS4
	(Matrix Offset: 0x00A0) Priority Register A for Slave 4

RoReg	Reserved9 [1]

RwReg	CCFG_SMCNFCS
	(Matrix Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register

RoReg	Reserved10 [49]

RwReg	MATRIX_PRAS5
	(Matrix Offset: 0x00A8) Priority Register A for Slave 5

RwReg	MATRIX_PRAS6
	(Matrix Offset: 0x00B0) Priority Register A for Slave 6

RwReg	MATRIX_PRAS7
	(Matrix Offset: 0x00B8) Priority Register A for Slave 7

RwReg	MATRIX_PRAS8
	(Matrix Offset: 0x00C0) Priority Register A for Slave 8

RoReg	Reserved11 [1]

RwReg	MATRIX_PRAS9
	(Matrix Offset: 0x00C8) Priority Register A for Slave 9

RoReg	Reserved12 [1]

RoReg	Reserved13 [12]

RwReg	MATRIX_MRCR
	(Matrix Offset: 0x0100) Master Remap Control Register

RoReg	Reserved14 [56]

Detailed Description

Matrix hardware registers.

The documentation for this struct was generated from the following file:

src/CMSIS/Device/ATMEL/sam3n/include/component/component_matrix.h

Public Attributes

Detailed Description