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NVIC_Type Struct Reference
CMSIS Core Register » CMSIS NVIC

Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm0.h>

Public Attributes

__IO uint32_t ISER [1]
 
uint32_t RESERVED0 [31]
 
__IO uint32_t ICER [1]
 
uint32_t RSERVED1 [31]
 
__IO uint32_t ISPR [1]
 
uint32_t RESERVED2 [31]
 
__IO uint32_t ICPR [1]
 
uint32_t RESERVED3 [31]
 
uint32_t RESERVED4 [64]
 
__IO uint32_t IP [8]
 
__IO uint32_t IABR [8]
 
__IO uint8_t IP [240]
 
uint32_t RESERVED5 [644]
 
__O uint32_t STIR
 

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Member Data Documentation

__IO uint32_t NVIC_Type::IABR

Offset: 0x200 (R/W) Interrupt Active bit Register

__IO uint32_t NVIC_Type::ICER

Offset: 0x080 (R/W) Interrupt Clear Enable Register

__IO uint32_t NVIC_Type::ICPR

Offset: 0x180 (R/W) Interrupt Clear Pending Register

__IO uint8_t NVIC_Type::IP

Offset: 0x300 (R/W) Interrupt Priority Register

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

__IO uint8_t NVIC_Type::IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

__IO uint32_t NVIC_Type::ISER

Offset: 0x000 (R/W) Interrupt Set Enable Register

__IO uint32_t NVIC_Type::ISPR

Offset: 0x100 (R/W) Interrupt Set Pending Register

__O uint32_t NVIC_Type::STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

The documentation for this struct was generated from the following files: