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Pmc hardware registers. More...

#include <component_pmc.h>

Public Attributes

WoReg PMC_SCER
 (Pmc Offset: 0x0000) System Clock Enable Register
 
WoReg PMC_SCDR
 (Pmc Offset: 0x0004) System Clock Disable Register
 
RoReg PMC_SCSR
 (Pmc Offset: 0x0008) System Clock Status Register
 
RoReg Reserved1 [1]
 
WoReg PMC_PCER0
 (Pmc Offset: 0x0010) Peripheral Clock Enable Register 0
 
WoReg PMC_PCDR0
 (Pmc Offset: 0x0014) Peripheral Clock Disable Register 0
 
RoReg PMC_PCSR0
 (Pmc Offset: 0x0018) Peripheral Clock Status Register 0
 
RoReg Reserved2 [1]
 
RwReg CKGR_MOR
 (Pmc Offset: 0x0020) Main Oscillator Register
 
RoReg CKGR_MCFR
 (Pmc Offset: 0x0024) Main Clock Frequency Register
 
RwReg CKGR_PLLAR
 (Pmc Offset: 0x0028) PLLA Register
 
RoReg Reserved3 [1]
 
RwReg PMC_MCKR
 (Pmc Offset: 0x0030) Master Clock Register
 
RoReg Reserved4 [3]
 
RwReg PMC_PCK [3]
 (Pmc Offset: 0x0040) Programmable Clock 0 Register
 
RoReg Reserved5 [5]
 
WoReg PMC_IER
 (Pmc Offset: 0x0060) Interrupt Enable Register
 
WoReg PMC_IDR
 (Pmc Offset: 0x0064) Interrupt Disable Register
 
RoReg PMC_SR
 (Pmc Offset: 0x0068) Status Register
 
RoReg PMC_IMR
 (Pmc Offset: 0x006C) Interrupt Mask Register
 
RwReg PMC_FSMR
 (Pmc Offset: 0x0070) Fast Startup Mode Register
 
RwReg PMC_FSPR
 (Pmc Offset: 0x0074) Fast Startup Polarity Register
 
WoReg PMC_FOCR
 (Pmc Offset: 0x0078) Fault Output Clear Register
 
RoReg Reserved6 [26]
 
RwReg PMC_WPMR
 (Pmc Offset: 0x00E4) Write Protect Mode Register
 
RoReg PMC_WPSR
 (Pmc Offset: 0x00E8) Write Protect Status Register
 
RwReg CKGR_PLLBR
 (Pmc Offset: 0x002C) PLLB Register
 
RwReg PMC_USB
 (Pmc Offset: 0x0038) USB Clock Register
 
RoReg Reserved7 [5]
 
WoReg PMC_PCER1
 (Pmc Offset: 0x0100) Peripheral Clock Enable Register 1
 
WoReg PMC_PCDR1
 (Pmc Offset: 0x0104) Peripheral Clock Disable Register 1
 
RoReg PMC_PCSR1
 (Pmc Offset: 0x0108) Peripheral Clock Status Register 1
 
RoReg Reserved8 [1]
 
RwReg PMC_OCR
 (Pmc Offset: 0x0110) Oscillator Calibration Register
 
RwReg CKGR_MCFR
 (Pmc Offset: 0x0024) Main Clock Frequency Register
 
RwReg CKGR_UCKR
 (Pmc Offset: 0x001C) UTMI Clock Register
 
RwReg PMC_PCR
 (Pmc Offset: 0x010C) Peripheral Control Register
 

Detailed Description

Pmc hardware registers.


The documentation for this struct was generated from the following file: