PwmCh_num hardware registers. More...

Public Attributes
RwReg	PWM_CMR
	(PwmCh_num Offset: 0x0) PWM Channel Mode Register

RwReg	PWM_CDTY
	(PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register

RwReg	PWM_CPRD
	(PwmCh_num Offset: 0x8) PWM Channel Period Register More...

RwReg	PWM_CCNT
	(PwmCh_num Offset: 0xC) PWM Channel Counter Register More...

RwReg	PWM_CUPD
	(PwmCh_num Offset: 0x10) PWM Channel Update Register

RoReg	Reserved1 [3]

RwReg	PWM_CDTYUPD
	(PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register

RwReg	PWM_CPRDUPD
	(PwmCh_num Offset: 0x10) PWM Channel Period Update Register

RwReg	PWM_DT
	(PwmCh_num Offset: 0x18) PWM Channel Dead Time Register

RwReg	PWM_DTUPD
	(PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register

Detailed Description

PwmCh_num hardware registers.

Member Data Documentation

RwReg PwmCh_num::PWM_CCNT

(PwmCh_num Offset: 0xC) PWM Channel Counter Register

(PwmCh_num Offset: 0x14) PWM Channel Counter Register

RwReg PwmCh_num::PWM_CPRD

(PwmCh_num Offset: 0x8) PWM Channel Period Register

(PwmCh_num Offset: 0xC) PWM Channel Period Register

The documentation for this struct was generated from the following file: