Uart hardware registers. More...

Public Attributes
WoReg	UART_CR
	(Uart Offset: 0x0000) Control Register

RwReg	UART_MR
	(Uart Offset: 0x0004) Mode Register

WoReg	UART_IER
	(Uart Offset: 0x0008) Interrupt Enable Register

WoReg	UART_IDR
	(Uart Offset: 0x000C) Interrupt Disable Register

RoReg	UART_IMR
	(Uart Offset: 0x0010) Interrupt Mask Register

RoReg	UART_SR
	(Uart Offset: 0x0014) Status Register

RoReg	UART_RHR
	(Uart Offset: 0x0018) Receive Holding Register

WoReg	UART_THR
	(Uart Offset: 0x001C) Transmit Holding Register

RwReg	UART_BRGR
	(Uart Offset: 0x0020) Baud Rate Generator Register

RoReg	Reserved1 [55]

RwReg	UART_RPR
	(Uart Offset: 0x100) Receive Pointer Register

RwReg	UART_RCR
	(Uart Offset: 0x104) Receive Counter Register

RwReg	UART_TPR
	(Uart Offset: 0x108) Transmit Pointer Register

RwReg	UART_TCR
	(Uart Offset: 0x10C) Transmit Counter Register

RwReg	UART_RNPR
	(Uart Offset: 0x110) Receive Next Pointer Register

RwReg	UART_RNCR
	(Uart Offset: 0x114) Receive Next Counter Register

RwReg	UART_TNPR
	(Uart Offset: 0x118) Transmit Next Pointer Register

RwReg	UART_TNCR
	(Uart Offset: 0x11C) Transmit Next Counter Register

WoReg	UART_PTCR
	(Uart Offset: 0x120) Transfer Control Register

RoReg	UART_PTSR
	(Uart Offset: 0x124) Transfer Status Register

Detailed Description

Uart hardware registers.

The documentation for this struct was generated from the following file:

Public Attributes