Robobo

Adc hardware registers. More...

#include <component_adc.h>

Public Attributes

WoReg ADC_CR
 (Adc Offset: 0x00) Control Register
 
RwReg ADC_MR
 (Adc Offset: 0x04) Mode Register
 
RwReg ADC_SEQR1
 (Adc Offset: 0x08) Channel Sequence Register 1
 
RwReg ADC_SEQR2
 (Adc Offset: 0x0C) Channel Sequence Register 2
 
WoReg ADC_CHER
 (Adc Offset: 0x10) Channel Enable Register
 
WoReg ADC_CHDR
 (Adc Offset: 0x14) Channel Disable Register
 
RoReg ADC_CHSR
 (Adc Offset: 0x18) Channel Status Register
 
RoReg Reserved1 [1]
 
RoReg ADC_LCDR
 (Adc Offset: 0x20) Last Converted Data Register
 
WoReg ADC_IER
 (Adc Offset: 0x24) Interrupt Enable Register
 
WoReg ADC_IDR
 (Adc Offset: 0x28) Interrupt Disable Register
 
RoReg ADC_IMR
 (Adc Offset: 0x2C) Interrupt Mask Register
 
RoReg ADC_ISR
 (Adc Offset: 0x30) Interrupt Status Register
 
RoReg Reserved2 [2]
 
RoReg ADC_OVER
 (Adc Offset: 0x3C) Overrun Status Register
 
RwReg ADC_EMR
 (Adc Offset: 0x40) Extended Mode Register
 
RwReg ADC_CWR
 (Adc Offset: 0x44) Compare Window Register
 
RoReg Reserved3 [2]
 
RoReg ADC_CDR [16]
 (Adc Offset: 0x50) Channel Data Register More...
 
RoReg Reserved4 [21]
 
RwReg ADC_WPMR
 (Adc Offset: 0xE4) Write Protect Mode Register
 
RoReg ADC_WPSR
 (Adc Offset: 0xE8) Write Protect Status Register
 
RoReg Reserved5 [5]
 
RwReg ADC_RPR
 (Adc Offset: 0x100) Receive Pointer Register
 
RwReg ADC_RCR
 (Adc Offset: 0x104) Receive Counter Register
 
RoReg Reserved6 [2]
 
RwReg ADC_RNPR
 (Adc Offset: 0x110) Receive Next Pointer Register
 
RwReg ADC_RNCR
 (Adc Offset: 0x114) Receive Next Counter Register
 
RoReg Reserved7 [2]
 
WoReg ADC_PTCR
 (Adc Offset: 0x120) Transfer Control Register
 
RoReg ADC_PTSR
 (Adc Offset: 0x124) Transfer Status Register
 
RwReg ADC_CGR
 (Adc Offset: 0x48) Channel Gain Register
 
RwReg ADC_COR
 (Adc Offset: 0x4C) Channel Offset Register
 
RwReg ADC_ACR
 (Adc Offset: 0x94) Analog Control Register
 
RoReg ADC_SR
 (Adc Offset: 0x1C) Status Register
 

Detailed Description

Adc hardware registers.

Member Data Documentation

RoReg Adc::ADC_CDR

(Adc Offset: 0x50) Channel Data Register

(Adc Offset: 0x30) Channel Data Register


The documentation for this struct was generated from the following file: