|
|
#define | HSMCI ((Hsmci *)0x40000000U) |
| | (HSMCI ) Base Address
|
| |
|
#define | SSC ((Ssc *)0x40004000U) |
| | (SSC ) Base Address
|
| |
|
#define | SPI ((Spi *)0x40008000U) |
| | (SPI ) Base Address
|
| |
|
#define | TC0 ((Tc *)0x40080000U) |
| | (TC0 ) Base Address
|
| |
|
#define | TWI0 ((Twi *)0x40084000U) |
| | (TWI0 ) Base Address
|
| |
|
#define | PDC_TWI0 ((Pdc *)0x40084100U) |
| | (PDC_TWI0 ) Base Address
|
| |
|
#define | TWI1 ((Twi *)0x40088000U) |
| | (TWI1 ) Base Address
|
| |
|
#define | PDC_TWI1 ((Pdc *)0x40088100U) |
| | (PDC_TWI1 ) Base Address
|
| |
|
#define | PWM ((Pwm *)0x4008C000U) |
| | (PWM ) Base Address
|
| |
|
#define | PDC_PWM ((Pdc *)0x4008C100U) |
| | (PDC_PWM ) Base Address
|
| |
|
#define | USART0 ((Usart *)0x40090000U) |
| | (USART0 ) Base Address
|
| |
|
#define | PDC_USART0 ((Pdc *)0x40090100U) |
| | (PDC_USART0) Base Address
|
| |
|
#define | USART1 ((Usart *)0x40094000U) |
| | (USART1 ) Base Address
|
| |
|
#define | PDC_USART1 ((Pdc *)0x40094100U) |
| | (PDC_USART1) Base Address
|
| |
|
#define | USART2 ((Usart *)0x40098000U) |
| | (USART2 ) Base Address
|
| |
|
#define | PDC_USART2 ((Pdc *)0x40098100U) |
| | (PDC_USART2) Base Address
|
| |
|
#define | UDPHS ((Udphs *)0x400A4000U) |
| | (UDPHS ) Base Address
|
| |
|
#define | ADC12B ((Adc12b *)0x400A8000U) |
| | (ADC12B ) Base Address
|
| |
|
#define | PDC_ADC12B ((Pdc *)0x400A8100U) |
| | (PDC_ADC12B) Base Address
|
| |
|
#define | ADC ((Adc *)0x400AC000U) |
| | (ADC ) Base Address
|
| |
|
#define | PDC_ADC ((Pdc *)0x400AC100U) |
| | (PDC_ADC ) Base Address
|
| |
|
#define | DMAC ((Dmac *)0x400B0000U) |
| | (DMAC ) Base Address
|
| |
|
#define | SMC ((Smc *)0x400E0000U) |
| | (SMC ) Base Address
|
| |
|
#define | MATRIX ((Matrix *)0x400E0200U) |
| | (MATRIX ) Base Address
|
| |
|
#define | PMC ((Pmc *)0x400E0400U) |
| | (PMC ) Base Address
|
| |
|
#define | UART ((Uart *)0x400E0600U) |
| | (UART ) Base Address
|
| |
|
#define | PDC_UART ((Pdc *)0x400E0700U) |
| | (PDC_UART ) Base Address
|
| |
|
#define | CHIPID ((Chipid *)0x400E0740U) |
| | (CHIPID ) Base Address
|
| |
|
#define | EFC0 ((Efc *)0x400E0800U) |
| | (EFC0 ) Base Address
|
| |
|
#define | EFC1 ((Efc *)0x400E0A00U) |
| | (EFC1 ) Base Address
|
| |
|
#define | PIOA ((Pio *)0x400E0C00U) |
| | (PIOA ) Base Address
|
| |
|
#define | PIOB ((Pio *)0x400E0E00U) |
| | (PIOB ) Base Address
|
| |
|
#define | RSTC ((Rstc *)0x400E1200U) |
| | (RSTC ) Base Address
|
| |
|
#define | SUPC ((Supc *)0x400E1210U) |
| | (SUPC ) Base Address
|
| |
|
#define | RTT ((Rtt *)0x400E1230U) |
| | (RTT ) Base Address
|
| |
|
#define | WDT ((Wdt *)0x400E1250U) |
| | (WDT ) Base Address
|
| |
|
#define | RTC ((Rtc *)0x400E1260U) |
| | (RTC ) Base Address
|
| |
|
#define | GPBR ((Gpbr *)0x400E1290U) |
| | (GPBR ) Base Address
|
| |
1.8.11 
